BEGIN:VCALENDAR
PRODID:-//CERN//CDS Agenda 5.0//EN
VERSION:1.0
TZ:+01
BEGIN:VEVENT
UID:CDSAgenda-519f5f19b8261@cern.ch
ATTENDEE;ROLE=ORGANIZER: smr1977@ictp.it
DTSTART:20080616T000000
DTEND:20080711T000000
DESCRIPTION:[http://cdsagenda5.ictp.it/fullAgenda.php?ida=a07186]
SUMMARY:First ICTP Regional Microelectronics Workshop and Training on VHDL for Hardware Synthesis and FPGA Design in Asia-Pacific
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